发明名称 Synchronizing conversion apparatus and method as well as recording medium
摘要 The invention provides a synchronizing conversion apparatus wherein outpacing compensation can be executed with a circuit construction including a comparatively small number of components. A read control circuit produces a read control signal including a read address and a read timing based on an outpacing detection signal from a phase comparison circuit, which is generated taking a time required for processing of a memory access arbitration circuit into consideration, and a scene change detection signal from a scene change detection circuit. The read control signal is outputted to the memory access arbitration circuit. The memory access arbitration circuit arbitrates requests from a write control circuit and the read control circuit to control writing into and reading out from a frame memory.
申请公布号 US6538700(B1) 申请公布日期 2003.03.25
申请号 US20000602828 申请日期 2000.06.23
申请人 SONY CORPORATION 发明人 OHTA MASASHI;FUKUDA KYOKO;KOBAYASHI HIROSHI
分类号 G09G5/00;G09G5/18;H04N5/073;H04N5/14;H04N7/01;(IPC1-7):H04N9/475 主分类号 G09G5/00
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