| 摘要 |
An input/output circuit in which a reset control circuit is provided in an NC board, and a logic circuit comprising a REG0 register and a REG1 register each for setting an object for reboot processing, two inverters, an AND gate, and an OR gate is provided in the reset control circuit. According to the setting in the registers, a reset signal RST* for starting reboot processing to the NC board while a PC control section is kept on operating is validated by the logic circuit. On the other hand the reset signal RST* is invalidated by the logic circuit when the reboot processing is executed to the PC control section.
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