| 摘要 |
A clock synchronizing circuit enables initial synchronization of clock in spite of the case of modulation system except for quadrature modulation with simple constitution. A cosine/sine output circuit inputs thereto an integration clock "ICLK', a sampling signal "SSAMP', a sign switching signal "SPM', a cosine component integration signal "SCCI', and a sine component integration signal, before obtaining a cosine signal "SCOS' corresponding to a cosine component of initial phase of a symbol clock and a sine signal "SSIN' corresponding to a sine component thereof. An angular detector inputs thereto the cosine signal "SCOS' and the sine signal "SSIN', before obtaining initial phase of the symbol clock "SCLK'.
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