发明名称 NOISE REDUCTION CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a noise reduction circuit capable of improving the noise reduction effect in an edge-less part or in a part where a plurality of edges overlap. SOLUTION: The noise reduction circuit comprises an average value output circuit 3, a first determination circuit 4, a reference value output circuit 5, a second determination circuit 6, and an evaluation value output circuit 7. The average value output circuit 3 divides a processing region of a prescribed size into a plurality of small regions A1-A9 including a target pixel T and the adjacent pixels and calculates the average (e) of the concentration, etc., by each small region. The first determination circuit 4 outputs a judgment value A indicating distribution, etc., of the average (e) of the concentration by each small region and the concentration of each pixel. The reference value output circuit 5 outputs the average (e) in a small region indicating the most flat value as the reference value. The second determination circuit 6 outputs a judgment value B indicating distribution, etc., of the reference value and the average (e) in each small region. The evaluation value output circuit 7 outputs evaluation values on the concentration, etc., of the target pixel T by using the average (e) and the judgment values A and B.
申请公布号 JP2003085553(A) 申请公布日期 2003.03.20
申请号 JP20010274151 申请日期 2001.09.10
申请人 SHARP CORP 发明人 WATANABE KAZUNORI
分类号 G06T5/00;H04N1/409;H04N5/21;(IPC1-7):G06T5/00 主分类号 G06T5/00
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