| 摘要 |
Techniques, including a system and method, are disclosed for conditionally pre-charging a memory circuit, for example a flip-flop, and thus reducing power consumption. In an embodiment a method for reducing power consumption in a memory circuit, including, a pre-charged stage coupled to an evaluation stage by at least an internal node, is provided. The method includes setting an input of the pre-charged stage to a first high logic level. Next, responsive to the setting of the input, the internal node is set to a low logic level within a first transparency window. Then responsive to the setting of the internal node, the evaluation stage changes the output of the evaluation stage to a second high logic level within the first transparency window. Lastly, when the input remains at the first high-logic level, the internal node is maintained at the low logic level through at least a second transparency window.
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