发明名称 Semiconductor device and method of manufacturing
摘要 A semiconductor device has the following construction. A first metal layer consisting of a buried metal layer is connected to a diffusion layer within a substrate or to a lower-layer wiring. Further, a first metal wiring layer, a second metal layer consisting of a buried metal layer, and a second metal wiring layer are sequentially connected. And within a groove passing through insulating layers sandwiching the metal wiring layer from above and below the same as well as on one of the insulating layers there is formed a capacitive element C. When manufacturing the semiconductor device, the second layer-insulating layer is formed in such a way as to cover the metal wiring layer on the first layer-insulating layer. Removal is performed of at least respective parts, corresponding to a memory cell portion, of the first and the second layer-insulating layers. Thereafter, the capacitive element C is formed in regions corresponding to the removed portions of the first and the second layer-insulating layer. As a result of this, the invention provides a semiconductor device and a method of manufacturing the same, which, in the semiconductor device having co-loaded a semiconductor memory and a logic circuit on the same semiconductor substrate, enables realizing both the increase in the capacity of the semiconductor memory and the increase in the degree of integration of the logic circuit.
申请公布号 US2003052350(A1) 申请公布日期 2003.03.20
申请号 US20000572466 申请日期 2000.05.17
申请人 OHNO KEIICHI 发明人 OHNO KEIICHI
分类号 H01L21/8242;H01L21/82;H01L27/108;H01L29/76;(IPC1-7):H01L27/108 主分类号 H01L21/8242
代理机构 代理人
主权项
地址