发明名称 LOGIC CIRCUIT AND COMBINATION LOGIC CIRCUIT CONFIGURED BY USING THE SAME
摘要 PROBLEM TO BE SOLVED: To provide a logic circuit having logic gates with two serially connected resonance tunnelling elements which is configured without using a transistor in an input element and can perform a fast operation. SOLUTION: A logic gate 10 of a previous stage with resonance tunnelling elements RTD11 and RTD12 connected serially and a logic gate 20 of a post stage with resonance tunnelling elements RTD21 and RTD22 connected serially are connected through a capacitor Cc between the logic gates 10 and 20. A clock2 applied to the logic gate 20 of the post stage is delayed from a clock1 applied to the logic gate 10 of the previous stage only for a very short time. According to such a configuration, an output current of the logic gate 10 of the previous stage is caused to flow to a connection between the resonance tunnelling elements RTD21 and RTD22 of the logic gate 20 of the post stage through the capacitor Cc, and by the output current, an output voltage of the logic gate 20 of the post stage can be switched.
申请公布号 JP2003087111(A) 申请公布日期 2003.03.20
申请号 JP20010272197 申请日期 2001.09.07
申请人 NAGOYA INDUSTRIAL SCIENCE RESEARCH INST 发明人 MAEZAWA KOICHI;MIZUTANI TAKASHI
分类号 H03K19/10;(IPC1-7):H03K19/10 主分类号 H03K19/10
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