发明名称 Method for fabricating an integrated semiconductor circuit
摘要 Recesses between gate layer stacks are filled with a first electrically insulating material. Cavities or voids are opened up during the removal of a portion of the first insulating material. These voids are filled during the application of a conductive layer and can then lead to short circuits. Inventively, a layer for closing up voids is produced before the conductive material is applied, as a result of growing a second electrically insulating material onto the surface of the remaining first insulating material. This second insulating layer closes up voids that have formed in the first insulating material so that they can no longer lead to short circuits. In particular, voids that are difficult to gain access to and open out into side walls of contact holes can in this way be closed up in a simple manner.
申请公布号 US2003054630(A1) 申请公布日期 2003.03.20
申请号 US20020237543 申请日期 2002.09.09
申请人 KIRCHHOFF MARKUS 发明人 KIRCHHOFF MARKUS
分类号 H01L21/60;H01L21/762;H01L21/768;(IPC1-7):H01L21/76;H01L21/476;H01L21/320 主分类号 H01L21/60
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