发明名称 High linearity, high gain mixer circuit
摘要 A mixer circuit includes a first signal input terminal connected to the gate of a first MOSFET, and a second signal input terminal connected to the gate of a second MOSFET. The mixer circuit is configured such that a relationship (VG1-VGS2)<(VGS2-VT1) is established, where VG1 is a bias voltage applied to the gate of the first MOS transistor, VGS2 is a bias voltage applied to the gate of the second MOS transistor, and VT1 is a threshold voltage of the first MOS transistor, the bias voltages VG1 and VGS2 being each defined with respect to the source bias voltage of the second MOS transistor. This can implement high linearity mixer circuit even when operated at a low power supply voltage.
申请公布号 US2003052727(A1) 申请公布日期 2003.03.20
申请号 US20020193300 申请日期 2002.07.12
申请人 KOMURASAKI HIROSHI;SATO HISAYASU;UEDA KIMIO 发明人 KOMURASAKI HIROSHI;SATO HISAYASU;UEDA KIMIO
分类号 H03F1/22;H03D7/12;H03F1/02;H03F3/181;(IPC1-7):G06G7/16 主分类号 H03F1/22
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