TIMER CIRCUIT AND SEMICONDUCTOR MEMORY

摘要

PROBLEM TO BE SOLVED: To provide a timer circuit whose dependence on a power source voltage is reduced. SOLUTION: This timer circuit 11 has an input gate 21 detecting the transition of a pseudo word line signal SWL and a delay element 22 delaying the transition of an output voltage is incorporated in the input gate 21. A comparator circuit 23 is used in the timer circuit 11 in order to generate a sense amplifier activating signal SAE by detecting the transition of the output node ND of the input gate 21. The reference voltage VREF of the comparator circuit 23 is obtained by dividing the same power source voltage as a power source voltage VEXT which is applied to the input gate 21.