| 摘要 |
<p>PROBLEM TO BE SOLVED: To provide a digital integrated circuit in which desired function and performance are realized by low consumption power. SOLUTION: A first circuit block 11 is synchronized with a first clock signal C1 at a prescribed frequency, and is operated by a first power source P1 having a prescribed voltage. A second circuit block 21 is synchronized with a second clock signal C2 at a frequency lower than that of the first clock signal C1, and is operated by a second power source P2 or by a threshold value of a transistor which is so set that consumption power is reduced. A voltage of the second power source P2 is so set that the consumption power is reduced within a range that a switching speed of an internal transistor is allowable, and lower than the voltage of the first power source P1.</p> |
