发明名称 |
QUANTIZATION CIRCUIT AND ANALOG/DIGITAL CONVERTER USING THE SAME |
摘要 |
PROBLEM TO BE SOLVED: To provide quantization circuits with excellent isolation between an input and an output. SOLUTION: Isolation between an input and an output is improved by cascading the quantization circuits to make a multistage configuration that matches clock timing, and the multistage configuration quantization circuits are also applied to a digital sigma type AD converter.
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申请公布号 |
JP2003087119(A) |
申请公布日期 |
2003.03.20 |
申请号 |
JP20010273926 |
申请日期 |
2001.09.10 |
申请人 |
NIPPON TELEGR & TELEPH CORP <NTT> |
发明人 |
MUTO YOSHIKAZU;FUKUYAMA HIROYUKI;ENOKI TAKATOMO;SHIBATA YUKIMICHI |
分类号 |
H03M1/12;H03M3/02;(IPC1-7):H03M1/12 |
主分类号 |
H03M1/12 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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