发明名称 Method of fabricating TDMOS device using self-align technique
摘要 A method of fabricating a vertical TDMOS power device using sidewall spacers and a self-align technique and a TDMOS power device of the same. The TDMOS is fabricated using only 3 masks and a source is formed using the self-align technique to embody a highly integrated trench formation. During the process, ion implantation of high concentration into the bottom of the trench makes a thick oxide film grow on the bottom and the corner of the gate, so that electrical characteristic, specifically leakage current and breakdown voltage of the device can be improved. Also, process steps can be much decreased to lower process cost, high integration is possible, and reliability of the device can be improved.
申请公布号 US6534365(B2) 申请公布日期 2003.03.18
申请号 US20000726910 申请日期 2000.11.29
申请人 ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE 发明人 KIM JONG DAE;KIM SANG GI;KOO JIN GUN;NAM KEE SOO;LEE DAE WOO;ROH TAE MOON
分类号 H01L27/085;H01L21/336;H01L29/08;H01L29/423;H01L29/78;(IPC1-7):H01L21/336 主分类号 H01L27/085
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