| 摘要 |
A plurality of sense amplifier areas are placed alternately with respect to a plurality of memory array areas arranged along a first direction. The plurality of memory array areas are respectively provided with a plurality of bit lines provided along the first direction, a plurality of word lines provided along a second direction intersecting the first direction, and a plurality of memory cells provided in association with portions where the plurality of bit lines and the plurality of word lines intersect. Sense amplifiers are provided, each of which receives therein a pair of signals from each of the bit lines extending to one of the memory array areas on both sides adjacent to the respective sense amplifier areas and each of the bit lines extending to the other thereof. Respective word-line selecting timings or addresses with respect to the two memory array areas spaced away from each other with the two or more memory array areas interposed therebetween are independently set.
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