发明名称
摘要 In a node of a data communication system with a number of nodes, in which data communication system isochronous and asynchronous data is exchanged through a serial data bus structure, multiple link layer interface circuits are coupled to a single physical layer interface circuit. The physical layer interface circuit has an external port through which the physical layer interface circuit is connected to the serial bus structure. The physical layer interface circuit is coupled to the link layer interface circuits through bi-directional switches. A logic circuit controls the bi-directional switches and, in dependence of configuration information stored in configuration registers of the link layer interface circuits and its own programming, the logic circuit controls routing of isochronous and asynchronous data streams from the link layer interface circuits to the physical layer interface circuit, and from the physical layer interface circuit to the link layer interface circuits.
申请公布号 JP2003510974(A) 申请公布日期 2003.03.18
申请号 JP20010527533 申请日期 2000.09.15
申请人 发明人
分类号 H04L12/28;H04L12/40;H04L12/46;H04L29/06;H04L29/08;(IPC1-7):H04L12/28 主分类号 H04L12/28
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