发明名称 Process flow for sacrificial collar scheme with vertical nitride mask
摘要 A process flow for forming a sacrificial collar (132) within a deep trench (113) of a semiconductor memory cell. A nitride liner layer (120) is deposited over a substrate (111). A thin polysilicon layer (122) is deposited over the nitride liner layer (120), and an oxide layer (124) is formed. A resist (116) is deposited within the trenches (113) and etched back. The top portion of the oxide layer (124) is removed, and the resist (116) is removed from the trenches (113). The wafer (100) is exposed to a nitridation process to form a nitride layer (128) over exposed portions of the polysilicon layer (122). The oxide layer (124) and polysilicon layer (124) are removed from the bottom of the trenches. (113). The nitride liner layer (120) is removed from the bottom of the trenches (113). The polysilicon layer (122) is removed from the top of the trenches (113) to leave a sacrificial collar (132) in the top of the trenches 113 formed by nitride liner layer (120).
申请公布号 US6534376(B2) 申请公布日期 2003.03.18
申请号 US20010930690 申请日期 2001.08.15
申请人 INFINEON TECHNOLOGIES AG 发明人 TEWS HELMUT HORST
分类号 H01L21/8242;(IPC1-7):H01L21/20 主分类号 H01L21/8242
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