| 摘要 |
PURPOSE: A method for fabricating a semiconductor device using pattern WITH 3-D structure is provided to produce a c-MOSFET by performing the whole etch, selective etch and the whole deposition process repeatedly without any mask process. CONSTITUTION: A 3-D structure pattern is formed on a substrate(100) by pressing a cast or mold onto the prepared materials on the substrate. An n-type device region is formed by reactive ion etching on the 3-D structure pattern and the insulating layer(102). Source electrode material is deposited to flatten the whole surface and then whole-etched to form a p+ source electrode(108). An n gate(124) and p+ drain(132) electrode are formed by the same etching process as that used in forming p+ source electrode. Likewise, p-type device region is formed and then n+ source(118), p+ gate and n+ drain electrode are formed. After forming a trench and then a metal wire repeatedly by performing the reactive ion etching, the whole etch and deposition, an NP metal wire(128), gate metal wire(136), n type metal wire(144) and p type metal wire(152) are formed in turn. A top protective layer(154) is covered to flatten the whole structure.
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