发明名称 MEMORY ACCESS DEVICE OF COMMUNICATION SYSTEM
摘要 PURPOSE: A memory access device of a communication system is provided to improve CPU performance by making the CPU operate other work while a DMA(Direct Memory Access) performs the memory access. CONSTITUTION: The CPU(21) makes a memory(23) be accessed by occupying an address bus and a data bus through a buffer according to a DMA access termination signal received from an access controller(25). The DMA(22) generates an access request in order to access to the memory(23), applies it to the access controller(25), and makes the memory(23) be accessed through the address bus and the data bus by receiving a response signal from the access controller(25). The buffer gives an authority to use the address bus and the data bus to the CPU(21) by receiving a buffer enable control signal from the access controller(25). The access controller(25) gives the authority to use the address bus and the data bus to the DMA(22) by generating the response signal according to the access request signal applied from the DMA(22) and applying it to the DMA(22), applies the buffer enable control signal to the buffer, and applies the DMA access termination signal to the CPU(21).
申请公布号 KR20030022493(A) 申请公布日期 2003.03.17
申请号 KR20010055605 申请日期 2001.09.10
申请人 HAN. B ELEC & TELE CO., LTD.;TELUTION CO., LTD. 发明人 CHO, SANG HUN;LEE, SU YEONG
分类号 G06F13/28;(IPC1-7):G06F13/28 主分类号 G06F13/28
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