| 摘要 |
PURPOSE: A method for generating a VHDL(Very High-speed integrated circuit Description Language) code by using the waveform transformation of an IP(Internet Protocol) interface is provided to be usefully applied to the designing of an asynchronous circuit excluding a main clock. CONSTITUTION: The method comprises steps of tabulating a truth table by enlarging a rising edge section in an optional sequential circuit waveform and dividing the waveform of input and output signals into many motion sections in a specific sequence(S1), classifying the input signals into a level signal and a pulse signal based on the output signals on the truth table(S2), simplifying the truth table and settling the remaining motion sequence(S3), drawing a flow chart of the remaining motion sequence depending on respective output signals(S4), writing a VHDL source code by referring to the flow chart(S5), and synthesizing an asynchronous electronic circuit with the VHDL source code by using a CAD(Computer-Aided Design) tool(S6).
|
