| 摘要 |
PURPOSE: A PCI(Peripheral Component interconnect) bus controlling device for processing a parallel digital signal based on PCI bus is provided to control a memory for embodying a high performance parallel DSP(Digital Signal Process) system based on a PCI bus. CONSTITUTION: An SDRAM controller(42) determines addresses allocated to each memory in a PCI controller(41) for accessing a local SDRAM(12), and applies a CS(Chip Select) signal of the SDRAM(12) as "low". For example, if the PCI controller(41) wants to access to the SDRAM(12), an address allocated in the PCI controller(41) with respect to the SDRAM(12) is transmitted to the SDRAM controller(42), and the SDRAM controller(42) decodes the address, applies a CS signal as "low" in the SDRAM(12) and accesses the SDRAM(12). If a PCI signal is transmitted through a PCI bus in an external processor, the PCI controller(41) transmits a hold signal and requests a local bus(17). If a hold response signal of an approval is received, "ads" and "read_write" signal are transmitted, and a data access instruction is transmitted, an address signal "ad" and "data" are transmitted, and executes a control for making an internal controller access a DSP unit(11) and the SDRAM(12).
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