| 摘要 |
<p>PROBLEM TO BE SOLVED: To actualize a circuit which controls timing with high precision by outputting a signal with a resolution less than cycles of a reference clock. SOLUTION: A delay chain part 1 delays a reference clock signal Ref and outputs the delayed signal to a state detection part 2. The state detection part 2 and a synchronous signal detection part 3 detects the number of states of delay cells which delay the reference clock signal Ref by one cycle according to the delayed signal synchronized with a reference pulse signal. A delay quantity arithmetic part 4 computes a delay quantity according to the number of stages of delay cells and generates a select signal according to the computed delay quantity, and outputs it to a signal select part 6. A delay chain part 5 delays and outputs an INDEX signal to the signal select part 6. The signal select part 6 selects one of output signals of the delay chain part 5 according to the inputted select signal and outputs the delay signal to the outside.</p> |
