发明名称 |
METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE |
摘要 |
PROBLEM TO BE SOLVED: To improve the degree of integration by preventing the diffusion of semiconductor impurities that occurs in a manufacturing process of a vertical NPN transistor. SOLUTION: A first N<+> type embedded diffusion layer 11 is formed by using a first N<+> type impurity on a P type substrate 10, and a second N<+> type embedded diffusion layer 12 is formed so as to protrude from the first N<+> type embedded diffusion layer at both sides of this first N<+> type embedded diffusion layer by using a second N<+> type impurity having a larger diffusion coefficient than that of the first N<+> type impurity. Then a third N<+> type diffusion layer 14 is made to grow by diffusion from the surface side of an N type epitaxial growth layer 13, and is joined to the second N<+> type embedded diffusion layer 12.
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申请公布号 |
JP2003077927(A) |
申请公布日期 |
2003.03.14 |
申请号 |
JP20010262290 |
申请日期 |
2001.08.30 |
申请人 |
MITSUMI ELECTRIC CO LTD |
发明人 |
WATANABE SADAHISA;OGAWA TAKASHI |
分类号 |
H01L21/331;H01L29/732;(IPC1-7):H01L21/331 |
主分类号 |
H01L21/331 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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