发明名称 |
COMPUTER DEVICE, AND MULTI-PROCESSOR SYSTEM |
摘要 |
PROBLEM TO BE SOLVED: To exclusively process bus lock transactions issued from each processor bus to each other within a processor system of the multi-node configuration. SOLUTION: The bus lock transactions issued from each processor bus are exclusively processed within the system by the exclusive access right register for uniquely controlling the exclusive access right between the processor nodes and the transaction ordering for ordering the transactions in the system.
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申请公布号 |
JP2003076652(A) |
申请公布日期 |
2003.03.14 |
申请号 |
JP20010262652 |
申请日期 |
2001.08.31 |
申请人 |
HITACHI LTD;HITACHI COMMUN SYST INC |
发明人 |
IRIE TAKEHIKO;KOYANAGI MASARU;TAWARA SHUNJI;TAKEUCHI TAKESHI;TAMATOSHI AKIRA |
分类号 |
G06F15/177;G06F13/18;(IPC1-7):G06F13/18 |
主分类号 |
G06F15/177 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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