发明名称 |
SEMICONDUCTOR MEMORY AND ITS FABRICATING METHOD |
摘要 |
PROBLEM TO BE SOLVED: To enhance the reliability of a memory by preventing a tunnel film from becoming thin due to a level difference step. SOLUTION: A control gate electrode 14 is formed selectively on a semiconductor substrate 11 through a first insulation film 13 and a floating gate electrode 16 is formed on one side face of the control gate electrode 14 through a second insulation film 15. The semiconductor substrate 11 has a level difference region 11c connecting a first major surface 11a and a second major surface while being covered with the floating gate electrode 16 wherein the level difference region 11c comprises a first level difference step 111 for connection with the first major surface 11a and a second level difference step 112 for connecting the first level difference step 111 with the second major surface 11b.
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申请公布号 |
JP2003078041(A) |
申请公布日期 |
2003.03.14 |
申请号 |
JP20010264027 |
申请日期 |
2001.08.31 |
申请人 |
MATSUSHITA ELECTRIC IND CO LTD;HALO LSI DESIGN & DEVICE TECHNOL INC |
发明人 |
NORO FUMIHIKO;OGURA SEIKI |
分类号 |
H01L21/8247;H01L21/28;H01L21/336;H01L27/115;H01L29/423;H01L29/788;H01L29/792;(IPC1-7):H01L21/824 |
主分类号 |
H01L21/8247 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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