发明名称 |
METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE |
摘要 |
PROBLEM TO BE SOLVED: To provide a method for manufacturing a semiconductor device by which the diffusion of impurity in an impurity area and a gate electrode is suppressed to prevent the variance of short channel effect and threshold voltage. SOLUTION: This method for manufacturing a semiconductor device includes a step for forming a gate electrode 7 on a p-type semiconductor substrate 1 with a silicon oxide film 5 as a gate insulation film, a step for introducing nitrogen to the gate electrode 7 and an n-well area 4, and a step for injecting a p-type impurity (boron) to the n-well area 4 of the p-type semiconductor substrate 1 while the gate electrode 7 is used as a mask and forming a p-type low-concentration diffusion layer 11 as a result.
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申请公布号 |
JP2003078136(A) |
申请公布日期 |
2003.03.14 |
申请号 |
JP20010268211 |
申请日期 |
2001.09.05 |
申请人 |
SANYO ELECTRIC CO LTD |
发明人 |
YONEDA HARUKI;TAKEDA YASUHIRO;NISHIDA ATSUHIRO;FUJITA KAZUNORI;MIZUHARA HIDEKI;INOUE TETSUHIRO;KOBAYASHI HISANORI |
分类号 |
H01L29/78;H01L21/265;H01L21/8238;H01L27/092;(IPC1-7):H01L29/78;H01L21/823 |
主分类号 |
H01L29/78 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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