DEVICE AND METHOD FOR REDUCING NUMBER OF SOFT JUDGMENT PROCESSING BIT, AND RECEIVER

摘要

PROBLEM TO BE SOLVED: To obtain a receiver capable of reducing the number of soft judgment processing bits of an error correcting/decoding device without newly adding any storage element for adding a delay time. SOLUTION: This receiver is provided with an average level detecting circuit 20 for calculating the mean value of the reliability (amplitude level) of received bits and for generating a number of bit reduction control signal from the calculated result, and a number of bit reducing circuit 30 for operating the correction processing of the reliability of the received bits after bit de-interleave processing and the reduction processing of the number of soft judgment processing bits based on the number of bit reduction control signal.