发明名称 Halbleiteranordnung und Herstellungsverfahren
摘要 A semiconductor device including a package substrate (10) having a surface defining a chip mount area and a peripheral area thereof. A semiconductor chip (12) is mounted on the chip mount area of the package substrate (40). An electrically insulating elastic layer (14) is provided on the peripheral area of the package substrate (10). A wiring pattern film (16) is provided on an outside surface of the elastic layer (14). The wiring pattern film (16) includes a base insulation film (22) and wiring patterns (16e) formed on the base insulation film (22), each of the wiring patterns (16e) having one end being connected with an external connection terminal (18) and the other end being connected with the semiconductor chip (12). The semiconductor chip (12) is sealed with a resin (24) by potting. <MATH>
申请公布号 DE69527330(T2) 申请公布日期 2003.03.13
申请号 DE1995627330T 申请日期 1995.09.07
申请人 SHINKO ELECTRIC INDUSTRIES CO., LTD. 发明人 HORIUCHI, MICHIO;HARAYAMA, YOICHI
分类号 C08G77/00;H01L21/60;H01L23/12;H01L23/14;H01L23/15;H01L23/24;H01L23/495;(IPC1-7):H01L23/24;H01L23/498;H01L23/31 主分类号 C08G77/00
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