发明名称 Transmission convergence sublayer circuit and operating method for asynchronous receiver
摘要 A transmission convergence sublayer circuit and operating method for an asynchronous transfer receiver. The transmission convergence sublayer circuit is coupled between a buffer and a deframer. The deframer submits a data stream enable signal and data bytes to the circuit. The data stream enable signal enables the circuit so that multiple groups of byte data belonging to a data cell are received and temporarily stored inside a byte-wise data pipeline. A header cyclic redundancy checker also receives the byte data and then conducts a header search. An idle cell identifier is used to determine if the data cell is a non-idle cell. When the header is found and determined to be a non-idle cell, a descrambler retrieves payload data of data cell from the byte-wise data pipeline and conducts a descrambling operation after obtaining a quantity of data equal to a double word. Ultimately, the double word data is output to the buffer with minimum delay. The circuit also incorporates an automatic error correction device for correcting single bit errors in the header cell so that the receiver circuit can continue with its reception function uninterrupted.
申请公布号 US2003048803(A1) 申请公布日期 2003.03.13
申请号 US20020064384 申请日期 2002.07.09
申请人 TSAI TIEN-JU;LIN CHIH-FENG 发明人 TSAI TIEN-JU;LIN CHIH-FENG
分类号 H04L12/56;H04Q11/04;(IPC1-7):H04L12/28 主分类号 H04L12/56
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