发明名称 METHOD FOR FABRICATING SILICIDE LAYER OF FLAT CELL MEMORY DEVICE
摘要 PURPOSE: A method for fabricating a silicide layer of a flat cell memory device is provided to reduce a number of fabrication processes by forming simultaneously mask patterns for defining STI(Shallow Trench Isolation) and a BN+(Buried N+ channel) diffusion layer. CONSTITUTION: An isolation layer and a BN+ diffusion layer are formed by performing simultaneously an isolation process and a BN+ diffusion layer forming process(S100). A well is formed by performing an ion implantation process(S102). A gate oxide layer is formed by performing a predetermined process(S104). A gate electrode is formed by performing a predetermined process(S106). Cells are divided by performing the ion implantation process(S108). A source/drain ion implantation process is performed(S110).
申请公布号 KR20030021029(A) 申请公布日期 2003.03.12
申请号 KR20010054461 申请日期 2001.09.05
申请人 DONGBU ELECTRONICS CO., LTD. 发明人 HAN, CHANG HUN
分类号 H01L21/76;H01L21/8246;H01L21/8247;H01L27/105;H01L27/115;(IPC1-7):H01L21/824 主分类号 H01L21/76
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