METHOD FOR FABRICATING SILICIDE LAYER OF FLAT CELL MEMORY DEVICE

摘要

PURPOSE: A method for fabricating a silicide layer of a flat cell memory device is provided to reduce resistances of wires by forming a silicide layer on a word line of a flat cell region and a salicide layer on the word line of a peripheral circuit region and an active region. CONSTITUTION: A word line(116) and a bit diffusion layer are formed on a flat cell array region of a substrate(100). The word line(116) and a source/drain junction are formed on a peripheral circuit region of the substrate(100). A gap-fill insulating layer is buried between the word lines(116). The gap-fill insulating layer is removed from the peripheral circuit region of the substrate(100). An insulating layer is formed on the substrate(100). A spacer(126) is formed on a sidewall of the word line(116) of the peripheral circuit region of the substrate(100) by etching the insulating layer. A silicide layer(128) is formed on the word line(116) of the flat cell array region. A salicide layer(130) is formed on the word line(116) of the peripheral circuit region and a surface of the substrate(100).