发明名称 |
Method of placing die to minimize die-to-die routing complexity on a substrate |
摘要 |
A method of fabricating a semiconductor package that may contain two or more dies. The method generally comprises the steps of (A) mounting a first die having a first side on an assembly apparatus and (B) mounting a second die having a second side and an adjoining third side on said assembly apparatus. The second die may be oriented such that (i) the second side and the third side both face the first side and (ii) the second side and the third side are both substantially nonparallel to the first side.
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申请公布号 |
US6531782(B1) |
申请公布日期 |
2003.03.11 |
申请号 |
US20010884330 |
申请日期 |
2001.06.19 |
申请人 |
CYPRESS SEMICONDUCTOR CORP. |
发明人 |
JONES CHRISTOPHER W.;WRIGHT ANDREW J. |
分类号 |
H01L25/065;(IPC1-7):H01L23/49;H01L23/52;H01L23/48;H01L27/06 |
主分类号 |
H01L25/065 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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