发明名称 |
Data processing system and method for performing enhanced pipelined operations on instructions for normal and specific functions |
摘要 |
A microprocessor with an efficient and powerful coprocessor interface architecture is provided. The microprocessor has a set of generic coprocessor instructions on its instruction map and interface signals dedicated to the coprocessor interface. Depending on which coprocessor is interfaced to the microprocessor, the generic.coprocessor instructions are renamed to the specific coprocessor commands. When a coprocessor instruction for a specific function is fetched and decoded by the host processor, the appropriate command is issued through the coprocessor interface signals to the coprocessor and the coprocessor performs the required tasks. Hence, the coprocessor interfaced with the host processor need not have its own program. The pipelined operations of the coprocessor are synchronized with pipelined operations of the host processor. |
申请公布号 |
US6532530(B1) |
申请公布日期 |
2003.03.11 |
申请号 |
US19990417667 |
申请日期 |
1999.10.14 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
KIM HONG-KYU;KIM YONG-CHUN;JEONG SEH-WOONG |
分类号 |
G06F9/30;G06F9/38;(IPC1-7):G06F9/30 |
主分类号 |
G06F9/30 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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