发明名称 |
Semiconductor device capable of adjusting internal potential |
摘要 |
A system LSI comprises a signal generation circuit supplying 16 level set signals one by one to an internal power supply potential generation circuit to increase an internal power supply potential in 16 stages, a compare circuit comparing each internal power supply potential with a reference potential and outputting a signal of a level responsive to the result of comparison and a memory circuit temporarily storing the signal output from the compare circuit. Therefore, an optimum level set signal can be readily detected on the basis of an output signal from the memory circuit.
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申请公布号 |
US6532183(B2) |
申请公布日期 |
2003.03.11 |
申请号 |
US20010983075 |
申请日期 |
2001.10.23 |
申请人 |
MITSUBISHI DENKI KABUSHIKI KAISHA |
发明人 |
OOISHI TSUKASA |
分类号 |
G01R31/28;G01R31/3183;G05F1/56;G11C5/14;G11C29/02;H01L21/822;H01L27/04;(IPC1-7):G11C7/00 |
主分类号 |
G01R31/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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