| 摘要 |
PROBLEM TO BE SOLVED: To provide an asynchronous superconductive logic circuit that can reduce power overhead and attain a high density configuration. SOLUTION: An asynchronous SFQ logic cell is amenable to being used in combinational logic circuits. Rather than encode each digital logic bit as one SFQ pulse, each logic bit is encoded as a series of SFQ pulses. As such, merge and join circuits can be used for elementary logic cells to form asynchronous combinational logic circuits in accordance with the present invention. Such circuits are relatively faster and denser as well as more compatible with existing synchronous SFQ logic circuits.
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