发明名称 FRAME MEMORY CIRCUIT
摘要 PROBLEM TO BE SOLVED: To obtain a frame memory in which needless memory, needless write- in/read-out of data, and disturbance of a screen are prevented, and various image can be expressed with simple constitution of a circuit. SOLUTION: This frame memory circuit is a command control type, memory elements consisting of DRAM specifying an access word by row and column addresses are used, this memory element generates a memory access basic command cycle of a read-command or a write-command alternately, a read- command or a write-command is permitted only if necessary or a write-in/read- out counter is sequentially increased in the direction of row, when it exceeds the maximum value of the memory element, a column is increased, operation for restoring a row to the minimum value is performed, and a refresh-cycle is eliminated.
申请公布号 JP2003068072(A) 申请公布日期 2003.03.07
申请号 JP20010261603 申请日期 2001.08.30
申请人 FUJITSU GENERAL LTD 发明人 OMORI HIDEYUKI;ONODERA JUNICHI;AIDA TORU
分类号 G11C11/401;G11C11/407;G11C11/408;H04N5/907;(IPC1-7):G11C11/401 主分类号 G11C11/401
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