METHOD FOR FORMING JUNCTION REGION IN SEMICONDUCTOR DEVICE

摘要

PURPOSE: A method for forming a junction region in a semiconductor device is provided to be capable of preventing out-diffusion of arsenic(As) during annealing for activation. CONSTITUTION: Gate electrodes(4) are formed on a silicon substrate(1) defined by a PMOS and NMOS transistor region. A p-type and n-type impurity are implanted into the PMOS and NMOS transistor region, respectively. A buffer layer(10) is formed on the surface of the substrate(1). By annealing the resultant structure for activating dopants, a p+ source/drain region(11a) and an n+ source/drain region(11b) are formed in the PMOS and NMOS transistor region, respectively.