发明名称 LOW-POWER SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 <p>PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit with low power consumption by reducing the power consumption needed for unnecessary clock distribution without stopping circuit operation. SOLUTION: A clock distribution control circuit 30 controls a clock distributing circuit 10 to stop unnecessary clock signals CLKa to CLKd and distribute only necessary signals to internal function blocks 21 to 24. Consequently, the power consumption is made low. Further, an abnormal state detecting circuit 40 detects a state wherein the signals CLKa to CLKd distributed to the internal function blocks are all continuously stopped and outputs an alarm signal 2 and a forcible recovery circuit 50 forces the clock distributing circuit 10 to distribute the clock to the internal function blocks 21 to 24, so that the circuit autonomously recovers to its normal state.</p>
申请公布号 JP2003067078(A) 申请公布日期 2003.03.07
申请号 JP20010252888 申请日期 2001.08.23
申请人 NEC CORP 发明人 TAKEUCHI MASAHIRO
分类号 G06F1/32;G06F1/04;G06F1/10;H03K19/003;(IPC1-7):G06F1/04 主分类号 G06F1/32
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