发明名称 MULTILAYER INTERCONNECTION BOARD
摘要 <p>PROBLEM TO BE SOLVED: To prevent a circuit for a power source or a ground from voltage dropping on a multilayer interconnection board. SOLUTION: The multilayer interconnection board comprises a core board 5 having connecting lands 4 extended from a through conductor passing through an insulating base 2 and a though conductor 3 to a surface of an insulating base 1, and a multilayer wiring section having a plurality of insulating layers 7 and a plurality of wiring conductor layers 8 laminated on a surface of the core board 5 on the insulating base 2. The layer 8 is formed at a site dispose directly above the land 4 in a mesh-like state, and a mesh opening area ratio of the site formed in the mesh-like state is 70% or more. An electromagnetic bond of the land 4 to the layer 7 becomes small. Occurrence of inconsistency of characteristic impedances of the lands 4 can be prevented. Increases in resistance values and impedance values of the layer 8 can be prevented.</p>
申请公布号 JP2003069231(A) 申请公布日期 2003.03.07
申请号 JP20010260274 申请日期 2001.08.29
申请人 KYOCERA CORP 发明人 KAWATSU HIDEO
分类号 H05K1/02;H01L23/12;H05K3/46;(IPC1-7):H05K3/46 主分类号 H05K1/02
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