| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor memory in which a refresh-cycle time can be shortened. SOLUTION: This semiconductor memory has regular memory cells provided at the prescribed intersections of a plurality of regular word lines and a plurality of bit lines and redundant memory cells provided at the prescribed intersections of redundant word lines and the plurality of bit lines, it is discriminated whether each of internal address signals and refresh-address signals for memory operation corresponds to an address of a defective word line out of the plurality of regular word lines or not by a redundant relieving circuit, and a defective word line caused in a regular word line is switched to a redundant word line by an address selecting circuit in accordance with the discriminated result. In the redundant relieving circuit, it is discriminated whether a refresh- address in which 1 is added to the refresh-address signal corresponds to a defective address or not, in the address selecting circuit, selecting operation of a regular word line or a redundant word line is performed conforming to the discriminated result in a previous cycle during refresh-operation.
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