发明名称 PROTECTION CIRCUIT OF CLOCK INVERSION CONTROL CIRCUIT FOR V.35 INTERFACE
摘要 PROBLEM TO BE SOLVED: To provide a data generation device in a communication system for communication between an NT side device with a V.35 interface and TE side equipment in which a received data error is caused as the device is immune to noises on a transmission line. SOLUTION: A network data generating device for a V.35 interface in the NT side device with a V.35 interface for generating network data by sampling the received data from the TE side equipment is provided with a protection means with an inversion control means capable of inverting a sampling clock phase when a conversion point of the received data falls in any one of guard areas set in the vicinity of the conversion points. The protection means is configured to invert the sampling clock phase only if the conversion point is in the guard area for a certain period of time or more.
申请公布号 JP2003069541(A) 申请公布日期 2003.03.07
申请号 JP20010251677 申请日期 2001.08.22
申请人 ANDO ELECTRIC CO LTD 发明人 KITAJIMA KUNIHIKO
分类号 H04L1/00;H04L7/00;H04L7/033 主分类号 H04L1/00
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