| 摘要 |
PURPOSE: To perform error correction even if multi-bit software error with which a plurality of bit errors are caused simultaneously and locally is caused, in a memory circuit. CONSTITUTION: For example, when read/write operation of 7 bits data in which parity bits of 3 bits are added to 4 bits data is performed for a memory cell array 21, error correction is performed every 7 bits data. In the memory array 21, memory units 31-37 sectioned every 4 bits in the direction of word line are prescribed, when 7 bits data is written in the memory cell array 21, one bit data being different mutually out of 7 bits data is written in each of the memory units 31-37 in the direction of word line as write bit data, and write bit data has interval of 4 bits in 7 bits data. Each of error correction circuits 24a-24d performs error correction of 7 bits bit data using 7 bits data as a unit respectively.
|
