| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor device having an interlayer insulating layer that has superior embedding characteristic of adjacent wiring layers even in the design rule of 0.13μm generation or lower, for example. SOLUTION: The semiconductor device 100 has the wiring layer 12 arranged in a predetermined pattern on a substrate 10, a stress relaxation layer 22 arranged on a predetermined pattern on the substrate 10, and a planarized insulating layer 26 that covers the wiring layer 12 and the stress relaxation layer 22 and is formed of fluid insulator. The interlayer insulating layer 20 is further capable of having a base insulating layer 24 and a cap insulating layer 28.
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