| 摘要 |
PURPOSE: To prevent reduction of the yield of flash memories caused by a defective memory cell of a redundant circuit in the flash memories. CONSTITUTION: Redundant circuits 11 to 15 are provided corresponding to memory blocks 1 to 5, bit lines BL0 to 15 are prescribed to the memory blocks, and spare bit lines SBL1 and 2 are prescribed to the redundant circuits 11 to 15. When defect of a memory cell is caused in the memory block 5 other than the memory block (e.g. BOOT block) 2 being previously decided and a bit line BL8 corresponding to the defective memory cell is replaced by a spare bit line SBL1, switches 56 and 76 corresponding to the spare bit line SBL1 are turned on, switches 48 and 88 corresponding to the spare bit line BL8 are turned on, and the spare bit line SBL1 is connected to the memory block 2 by bypassing the redundant circuit 12 corresponding to the memory block 2.
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