发明名称 |
SEMICONDUCTOR STORAGE AND ITS MANUFACTURING METHOD |
摘要 |
A memory cell of an SRAM is composed of a transfer MISFET, a drive MISFET, and a load MISFET fabricated over the drive MISFET. The load MISFET has a vertical structure where a gate electrode (23) is disposed over the side face of a multilayer structure (P) extending perpendicularly to a major surface of a semiconductor substrate (1), with a gate insulating film (22) interposed between the gate electrode (23) and the multilayer structure (P). The multilayer structure (P) is composed of polycrystalline silicon films: a lower semiconductor layer (13), an intermediate semiconductor layer (14), and an upper semiconductor layer (15) in order from below.
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申请公布号 |
WO03019663(A1) |
申请公布日期 |
2003.03.06 |
申请号 |
WO2002JP05613 |
申请日期 |
2002.06.06 |
申请人 |
HITACHI, LTD.;HASHIMOTO, TAKESHI;IWAI, HIDETOSHI |
发明人 |
HASHIMOTO, TAKESHI;IWAI, HIDETOSHI |
分类号 |
H01L21/8242;H01L21/8244;H01L27/108;H01L27/11;(IPC1-7):H01L27/11;H01L21/824 |
主分类号 |
H01L21/8242 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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