发明名称 NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE HAVING ACCELERATION COLUMN SCANNING SCHEME
摘要 PURPOSE: A non-volatile semiconductor memory device having acceleration column scanning scheme is provided to have an inner data bus of a width varied according to an operating mode, and to prevent a column scanning time from being increased when a page size is increased. CONSTITUTION: A memory cell array(110) has memory cells arranged in a plurality of rows and a plurality of columns. A read-out circuit(130) reads out data from the memory cell array through the plurality of columns and temporarily stores the read data. An inner data bus(DLia,DLib,DLic,DLid) are connected between the read-out circuit and a data output circuit(240), and transfers data from the read-out circuit to the data output circuit. A bus control circuit(180,220) makes the width of the inner data bus become variable according to an operating mode so that the width of the inner data bus becomes wider than that of a data input/output width of a memory device.
申请公布号 KR20030018357(A) 申请公布日期 2003.03.06
申请号 KR20010052057 申请日期 2001.08.28
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 LEE, JUN
分类号 G11C16/02;G11C7/10;G11C16/04;G11C16/06;G11C16/08;G11C16/34;(IPC1-7):G11C16/06 主分类号 G11C16/02
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