| 摘要 |
A digital-to-analog converting circuit of the invention includes p-channel FETs 13 to 16 that compose a current mirror circuit together with p-channel FETs 11, 22 to 24 causing a constant current to flow; transmission gates 42 to 44 perform control by which the number of transistors to be turned ON in the p-channel FETs 22 to 24 is decreased around a medium value of digital codes, and the number of transistors to be turned ON in the p-channel FETs 22 to 24 is increased around the minimum value and the maximum value of the digital codes; and switches 17 to 20 that output analog currents according to the digital codes into two-split routes.
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