| 摘要 |
A power transistor includes an n+ Si substrate, which has a surface intended for deposition, which is cleaned by wet chemical cleaning and further cleaned by vacuum heated cleaning, an n- Si buffer layer, which is deposited on the Si substrate as a deposition by CVD to cover impurities remaining on the surface intended for deposition, a p SiGe base layer, which is deposited as a deposition on the Si buffer layer by CVD, an n Si emitter layer on the SiGe base layer, a base electrode, an emitter electrode, and a collector electrode.
|
