发明名称 |
Power supply circuit for clamping excessive input voltage at predetermined voltage |
摘要 |
A power supply circuit that withstands voltages greater than or equal to a voltage capacity and prevents an increase in circuit area and manufacturing costs. The power supply circuit includes a first transistor for receiving a DC voltage and generating an internal power supply voltage. A clamp circuit is connected to the first transistor. The clamp circuit is activated when the DC current voltage is an excessive voltage to clamp the internal power supply voltage at a predetermined voltage that is less than the excessive voltage. A gate voltage control circuit is connected to the first transistor and the clamp circuit to supply the gate of the transistor with a control voltage so that the internal power supply voltage decreases when the clamp circuit is activated.
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申请公布号 |
US2003042882(A1) |
申请公布日期 |
2003.03.06 |
申请号 |
US20020107390 |
申请日期 |
2002.03.28 |
申请人 |
FUJITSU LIMITED |
发明人 |
KAWAMURA HIROSHI;ITO HIDENOBU;SHIMIZU KATSUYA;NAKAMICHI HIROTO |
分类号 |
H03K17/08;G05F3/26;H03F1/52;(IPC1-7):G05F3/04 |
主分类号 |
H03K17/08 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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