发明名称 Method of checking overlap accuracy of patterns on four stacked semiconductor layers
摘要 A method of checking overlap accuracy of patterns on fourth semiconductor layers. The first checking pattern is formed on the first semiconductor layer, the second checking pattern is formed on the second semiconductor layer, the third checking pattern is formed on the third semiconductor layer and the fourth checking pattern is formed on the fourth semiconductor layer. The first, second and third checking patterns overlap to form the first rectangular frame and the fourth checking pattern is surrounded by the first rectangular frame. A first pair of parallel sides of the first rectangular frame is formed by the first checking pattern and the second pair of parallel sides of the first rectangular frame is formed by the second and third checking patterns. Overlap accuracy of the patterns is obtained by checking the location error between the fourth checking pattern and the first checking pattern and the location error between the fourth checking pattern and the second and third checking patterns respectively.
申请公布号 US2003044057(A1) 申请公布日期 2003.03.06
申请号 US20020086928 申请日期 2002.02.28
申请人 NANYA TECHNOLOGY CORPORATION 发明人 LAN YUAN-KU
分类号 G03F7/20;G06K9/00;H01L21/027;H01L23/544;(IPC1-7):G06K9/00 主分类号 G03F7/20
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