发明名称 STACKED CHIP ASSEMBLY WITH STIFFENING LAYER
摘要 <p>A microelectronic subassembly 210 includes a substrate 215 having a top surface 216 and at least one peripheral region 219, a microelectronic element 201 mounted over the substrate 215, a plurality of leads 218, 222 electrically connected to the microelectronic element 201 having outer ends overlying the at least one peripheral region 219 of the substrate 215, and vertical conductors 208 electrically connected with the outer ends of the leads. The subassembly includes an encapsulant layer 204 provided over the top surface 216 of the substrate 215 and around the microelectronic element 201 and the vertical conductors 208 for stiffening the substrate 215 at the at least one peripheral region 219 of the substrate for facilitating handling and testing of the subassembly.</p>
申请公布号 WO2003019654(A1) 申请公布日期 2003.03.06
申请号 US2002026805 申请日期 2002.08.22
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